A description of various expansion buses relevant to TCM. These are the buses to into which optional expansion cards plug, or, in some cases, external peripherals. A single bus can usually accomodate multiple peripherals, which then share its bandwidth.
The original IBM XT had an expansion bus which ran at 4.77MHz, had an 8 bit data path and 20 address lines, and took 4 clock cycles to transfer a single word of one byte. Hence its peak theoretical speed was just 1.2MB/s. However, this bus matched precisely the characteristics of the 8088 processor.
The IBM AT, with its more powerful 80286 processor, caused this bus to be expanded to 16 bits data, 24 address lines, and 3 clock cycles per two byte word. This increased the speed to 5.3MB/s. The extra contacts required were arranged on a separate connector, so this bus can accept any old 8 bit card, provided that the 8 bit card is capable of running at 8MHz. Faster CPUs ran at a synchronous multiple of this bus speed, so a 33MHz CPU would drive the bus at 8.25MHz, and a 25MHz CPU at 8.33MHz.
These two buses, the 8 and 16 bit versions, were known as the Industry Standard Architecture bus.
The advent of the 386 CPU, and increasing amounts of video memory, provided a need for something faster. One solution, not developed by IBM, was the Enhanced ISA bus. This increased the data width to 32 bits, and had a "burst mode" in which one 4 byte word could be transfered every clock cycle for a consecutive range. EISA thus reached 32MB/s whilst retaining backwards compatibility.
IBM's attempt at replacing ISA was the Micro Channel Architecture bus. This ran at 10MHz, came in 16 and 32 bit versions, and supported a burst mode like EISA, so thus could achieve 40MB/s. Unlike EISA it was not backwardly compatible with ISA, and the chipsets required to interface with it never became cheap. It was used in many of IBM's PS/2 series in the late 1980s and early 1990s, and also in its RS/6000 workstations. However, it never gained widespread acceptance.
Peripheral Component Interconnect was formed by a consortium of manufacturers including Intel who were looking for something superior to EISA but cheaper than MCA. The original PCI had a 33MHz clock rate, was 32 bits wide, using the same pins for both data and addresses, and supported burst transfers. It was cheaper than MCA, and its 132MB/s peak performance but it a long way in front of EISA or MCA.
PCI then continued to evolve, with a 64 bit version being developed as well as a 66MHz version, hence one often sees PCI buses refered to as 33/64, 66/32 or 66/64, being the width and clock speeds. The 66MHz versions tend to run at 3.3V, whereas the original was 5V.
PCI-X is an emerging standard which runs a PCI bus at 133MHz.
The Advanced Graphics Port is very similar to PCI in many ways, but unlike all the above buses, it supports a single device (intended to be a graphics card). It is thus a point-to-point bus, with a device at each end, and this simplifies the protocol and the electrical characteristics. It is 32 bits wide, and runs at 66MHz, but comes in four varieties, x1, x2, x4 and x8, which can tranfer one, two, four and eight 32-bit words per clock cycle. When it was introduced PCs typically had a single 33/32 PCI bus, and simply placing the graphics card on a separate dedicated bus away from the disk drives and other peripherals produced a significant benefit.
Although PCI was developed for the PC, it has taken over most other computer buses, and, by doing so, has kept costs down. In the early 1990s, each major workstation family had its own bus: Apple used Nubus, DEC used TurboChannel, IBM used MCA, Sun used SBus. Now all of those have been superceded by PCI.
PCI Express has been designed to look like PCI from a programmer's viewpoint, but, unlike PCI which has multiple devices on the same physical bus, it uses point-to-point links to a central switch if multiple PCI-E slots are required, gaining some of the advantages of AGP. Thus it is similar to a switched ethernet network in topology.
The basic PCI Express bus has a pair of wires for transmit, and a pair for receive. Each runs at 2.5GHz, giving about 200MB/s bidirectional after overheads (each byte is encoded as 10 bits, and data are sent in the form of packets with a CRC). Multiple pairs are often used in parallel to give x1, x2, x4, x8, x12, x16 or x32 buses.
Intel currently (2004) uses PCI-Express for the connections between different chips on some of its motherboards, even when PCI-X is the bus finally presented to addon cards.
In 2007 PCI-e 2.0 was launched. It runs its lanes at twice the speed of PCI-e 1.1.
Both speed and number of lanes are negotiated. Provided a card fits physically in a slot, it should be able to negotiate something. It is common for slots to be physically x16, but electrically only x4.
PCMCIA was developed for laptops, and uses small plugin cards which fit into the two sockets that a typical laptop would have, and was mainly used for modems, ethernet cards and external disk interfaces.
The original PCMCIA or PC Card was actually rather slow, being similar to ISA in a different physical packaging, and came in three types, type I (3.3mm), II (5.0mm) and III (10.5mm), which refered to the physical thickness of the card which would fit into the slot provided. Its best performance was 20MB/s (16 bits and 10MHz).
Cardbus is the successor to PC Card, and manages a more reasonable transfer rate of 132MB/s over a 32 bit bus, being effectively PCI repackaged. It has the same physical size as PC Card, and a Cardbus slot must accept either type of card.
ExpressCard is the successor to Cardbus. It provides both a USB2 and a PCI-E x1 connection. The card is 5mm thick, and comes in two widths, 34mm and 54mm. The connector has 26 pins. Unlike Cardbus, an ExpressCard can plug straight into a PCI-E bus, for it really is PCI-E, and needs no further controller. ExpressCard is intended to be cheaper than Cardbus for a system which has PCI-E and PCI internally: fewer pins needed, less additional control logic.
The Universal Serial Bus is used for external peripherals, and differs from the above buses in running over long flexible cables, rather than a few inches of PCB track. The original standard, USB 1.1 and before, was really rather slow, running at just under 1.5MB/s, and thus little better than the original XT bus. However, it was an enormous improvement over the 10KB/s of the traditional serial line, and more than adequate for connecting to printers, scanners, and even slow disks, as well as keyboards and mice.
USB 2.0 represents a significant speed improvement to over 50MB/s.
Firewire is another, incompatible, serial bus which runs at 50MB/s (1394a, Firewire 400) or 100MB/s (1394b, Firewire 800, S800). It was launched after USB 1.1, against which it competed effectively, but before USB 2.0, which offers similar speeds more cheaply.
HyperTransport is a point-to-point bus favoured by AMD in its processor and motherboard designs. It usually runs at a clock speed of 800MHz (1GHz in more recent versions), although it can be as slow as 100MHz, and transfers data on both edges of each clock cycle. The bus width is relatively small, usually 8 or 16 bits. Like PCI-E, the links are fully bidirectional with separate wires for each direction.
HyperTransport thus allows the same protocol to be used over a wide range of speeds, and thus costs and distances. Currently (2004) AMD uses 16 bit 800MHz links between CPUs and to the "fast" I/O controller on its motherboards (3.2GB/s), but an 8 bit 100MHz link to the "slow" I/O controller (0.2GB/s). [2005: "fast" is now 1GHz.]
Intel's `hub interface' connects its I/O controllers (ICH2 to ICH5) to its north bridges. This interface runs at 266MB/s, and was an improvement over the previous use of a shared 133MB/s PCI bus. It has been superceded by DMI (Direct Media Interface) which runs at 1GB/s, and, unlike HI, can support full duplex operation at that speed.